Processors and Computation
Students need a solid understanding of the theoretical models for computation. They must also show knowledge of the many factors affecting the performance of processors. This includes a range of contemporary and historically relevant architectures, as well as the low-level processes common to them.
‘Unplugged’ resources, metaphorical models and detailed technical information can be found here. Topic requirements may vary between awarding bodies and their specifications.
Types of processor activities
A range of activities for students to carry out, a good introduction to RISC and CISC architectures and develop and understanding of CPU and their characteristics.
CPU card game
A card game based on the classic game of Snap. This activity helps to cement the link between key terms and their meaning and reinforces links.
History of supercomputers
Supercomputers represent the pinnacle of computer performance. This resource from the University of York provides a fascinating history for students and will consolidate the key concepts that they have learned about high-performance computer architecture.
Structure and Function of the Processor Delivery Guide
This document aligns with the OCR A level specification. It contains a number of useful links and suggestions for activities. There are a number of CPU benchmarking tools that can be used to compare performance, for example, an older, single core with a more modern dual core processor. The resource also includes two games to help cement terms and concepts. One uses the classic game of charades to guess keywords and includes a card game to simulate the Fetch Decode Execute cycle.
Structure and Function of the Processor Topic Exploration Guide
Another document that aligns to the OCR A level specification. It contains three suggested activities. The first is to develop an interactive poster or presentation on the topic of CPU function. Another suitable topic would be the concept of pipelining. As an alternative to a poster, a program developed using Scratch also works well. The second activity helps students to remember key terms associated with processors. The final activity uses the students themselves to role play components in the CPU to act out the Fetch Decode Execute cycle. It is very helpful to use practical activity to cement theoretical concepts so that they become more memorable and deeper understanding is developed.
Chip Hall of Fame
This interesting collection of ground-breaking processors allows students to browse through significant developments in chip architecture and to appreciate how these have been tailored to general and specific applications.
Pipelining
Students need to know that instruction throughput can be increased through the use of pipelining. This document uses easy to grasp analogies to explain the impact of pipelining on the fetch decode execute cycle. Students could use this to create a summary revision resource of the key points.
RISC and CISC Architectures
This document compares the Reduced Instruction Set Computer (RISC) and Complex Instruction Set Computer (CISC) approaches. It provides a useful background and can be used as a reference or for producing revision resources.
Fetch Decode Execute Cycle
Students may be familiar with the graphical programming language Scratch. This program allows students to step through the Fetch Decode Execute Cycle and to allow them to see how register values are affected as a program runs.
Raspberry Pi Architecture
The Raspberry Pi is an affordable microcomputer that has multiple applications in the teaching of A level Computer Science. This manual puts CPU architecture into context. It also provides scope for discussion of the System on Chip architecture which is also encountered in mobile computing devices.